热门职缺

感谢您拨冗参考本公司目前所提供的职缺. 如果您有意愿到本公司任职,欢迎您随时上网填写线上履历, 或是透过人力网站 www.104.com.tw 传递您的个人资料. 如果您有任何问题,欢迎您随时联络我们。

Please select the category : 热门职缺 R&D - Digital IC Design R&D - Analog IC Design R&D - System Application R&D - ESD Engineer Sales & Marketing Engineering Logistic & Administration Others 國防役退役人員專區 國防訓儲人員

1 2

职务名称 职务 学历 应徵条件 MB - Digital IC Designer 主要內容包含數位部分的Verilog Coding，FPGA，以及Algorithm 開發. MSEE or related fields. 1. Digital Design，VLSI Design 2. Verilog HDL 3. FPGA TV - 演算法開發工程師 PQ/Video decoder/Audio 演算法開發 1. 具二年以上相關經驗，熟悉C 及 Matlab 語言 2. 熟悉DSP及Communication systems 3. 熟悉Verilog及一般IC設計流程，有數位IC實作經驗佳 4. 具Video Codec/Data Compression/視訊處理等相關經驗佳 MSEE or related fields 1. 具多媒體影音相關晶片/軟體播放器等相關工作經驗佳 2. 具NSTC/PAL/SECAM； ATSC/DVB相關經驗佳 3. PLL或CDR (clock-data recovery)相關知識或背景 TV - SOC IC designer RTL coding & design flow 1. 具2年以上相關經驗 MSEE or related fields 1. 熟悉Familiar with CPU or DSP 2. 熟悉On chip bus system and architecture 3. 熟悉 ic 開發及驗證流程,並具量產經驗 VD TC - Mixed-signal Design Engineer 1. In charge of CDR, Equalizer, PLL, Transmitter Buffer circuit development. MSEE or related fields 1. Should be sophistcated in HSPICE and Matlab, and IC development flow. TV - Digital Front-end Receiver Engineer RF/IF system lvevel measurement, analysis, and perfromance tunning. 1. Algorithm development, rtl coding or FPGA verification for dVIF. MSEE or related fields 1. RF/IF performance measurement, noise analysis and specification defintion for aTV front-end receiver. 2. Matlab/c simulation, rtl coding or FPGA verification for aTV receiver systems. DTE - Cell library 工程師/主管 Advanced node cell library circuit design, characterization & qualification, including standard cells & I/O。 MSEE 1. 熟悉 ASIC design flow, 且具有二年以上相關實務經驗 2. Familiar with standard cell circuit design, library characterization & library qualification 3. Process development experience is a plus. DTE - SoC Physical Design Engineer SoC physical design methodology development & automation. MSEE 1. Familiar with ASIC design flow, 且具有二年以上相關實務經驗 2. Hands on SoC physical design from netlist to DRC/LVS tapeout experience is required, hierarchical and/or low power design flow is preferred. iPlay - 數位電視調變解調／通道解碼工程師 各類數位電視解調變技術如 QPSK, OFDM, QAM, VSB 等等, 以及通道解碼技術如 RS code, Viterbi, LDPC 等等之開發 及產品化, 應用於 STB 以及 iDTV 接收機。 MSEE or related fields. 1. IC設計 IM - Digital IC Designer SOC digital design RTL coding: 1. IP development, porting and verification. 2. IC system planning, integration and simulation. MSEE or related fields. 1. Minimum 2 years experience in digital IC design and familiar with design flow. At least be familiar with one of the following items. 2. SOC design flow practice. USB controller/PHY IC design. 3. CPU architecture development & integration. Memory card/NAND flash controller design. 4. 2D/3D graphic processor design. Audio/Video codec design. CMOS - Digital IC Designer 負責CIS產品數位IC設計工作： 1. 負責相關Verilog程式設計與模擬 2. 相關IC整合工作 3. FPGA相關設計及驗證工作 4. IC測試pattern相關工作 MSEE or related fields. 1. 熟悉以下任何一項： 　　－JPEG/H.264 　　－USB2.0 　　－ARM系統架構 2. Verilog程式設計 3. DFT / Synthesis / STA / PFGA設計實務經驗 4. Linux相關Script file撰寫基本技巧

1 2